MIPS Exceptions
Introduction In the MIPS architecture, an exception is a general label for interrupts and errors that require the processor to temporarily abandon sequential execution. An interrupt is an asynchronous request from an external device (e.g., timer, network), while a trap is a synchronous request from software (e.g., a system call). Errors detected inside the CPU (e.g., illegal instructions, misaligned accesses) are also treated as exceptions. When an exception occurs, the CPU saves the current program counter (PC) and status in dedicated registers, enters kernel mode, and jumps to an exception handler. ...